A memory cell array having three-dimensional structure is proposed. The memory cell array includes a stacked body including a plurality of electrode layers stacked via insulating layers. The electrode layer functions as a control gate in a memory cell. A memory hole is formed in the stacked body. A silicon body as a channel is provided on a side wall of the memory hole via a charge storage film.
As memory cells in such a three-dimensional memory device become smaller and denser, channel mobility in the thin channel may decrease.